Semiconductor devices are prevalent in countless different aspects of contemporary society, and as a result, the marketplace for such devices continues to advance at a fairly rapid pace. This advancement is evident in many respects and relates to semiconductor devices either directly or indirectly as well as the methods for forming such devices. For example, the advancement affects numerous device attributes and increases the need for attention to such attributes during design and manufacturing, where such attributes include device size, reliability, yield, and cost.
Some semiconductor manufacturing techniques relate to adhesion to dielectric layers in semiconductor devices. More specifically, some semiconductor manufacturing techniques relate to a dielectric layer that includes silicon, carbon, and oxygen and the adhesion of such a layer to a barrier layer that is to operate as a barrier between the dielectric layer and a metal, such as copper. Turning first to the dielectric layer having silicon, carbon, and oxygen, such materials are sometimes combined in a film known as organo-silicate glass (“OSG”), which is commercially available from Novellus and Applied Materials. OSG layers are attractive for various reasons, such as a favorable (i.e., relatively low) dielectric constant. Turning next to copper, its use favored, particularly as an interconnect metal, because relative to previously used metals, such as aluminum, copper provides lower resistance and, hence, greater reliability.
When interconnect metal, such as copper, is used in the same device as an OSG layer, a barrier layer may be provided between the copper and OSG. The barrier layer prevents or reduces the undesirable chance of metal diffusion into the dielectric. However, when placing a barrier layer between the OSG and interconnect metal, the adhesion of the barrier layer to the OSG may be unacceptable. Such adhesion has been empirically evaluated using several known testing techniques, and those techniques have demonstrated that the barrier layer may detach from the OSG, thereby failing to serve its underlying purpose as a barrier to a subsequently-formed metal layer/device. Tape testing has been used, wherein a semiconductor wafer, on which a barrier layer is formed on an OSG layer, is scribed and then tape is applied to the wafer and removed to determine if the layers remain intact. Under such testing, cracks have been found to form at the interface of the barrier layer and the OSG layer, thereby demonstrating qualitatively that the bond between the two layers is unacceptable. In another test, chemical mechanical polishing (“CMP”) was applied to the above-described wafer. This test is sometimes preferred in that it represents an actual manufacturing step, since CMP is often used to planarize various layers before subsequent processing steps. In any event, under CMP, failures between an adjacent OSG and barrier layer have also been observed.